Recently, IC designer Marvell announced that it will expand its long-term partnership with TSMC to 2nm and develop the industry's first 2nm semiconductor production platform for accelerated infrastructure optimization.

Currently, the most advanced advanced process mass production technology in the industry is the 3-nanometer process, which is manufactured by Samsung Electronics and TSMC. With Intel winning the first lithography machine of ASML and updating the latest foundry layout, as well as the increasingly close cooperation between Rapidus and IBM, the competitors of 2nm advanced process have significantly expanded to TSMC, Intel, Samsung, Rapidus and Marvell. It is reported that at present, the introduction time of the above five big manufacturers of 2 nm is basically planned in 2025, and the structure has chosen GAA.

Marvell: AI is in high demand and following up to 2 nm is a top priority

According to the press release, Marvell has transformed from a follower to a leader in bringing advanced node technology into silicon infrastructure. Marvell's success with the 5-nm platform was followed by several 5-nm designs and the first silicon infrastructure portfolio based on TSMC's 3-nm process.

Sandeep Bharathi, Marvell's chief development officer, pointed out that future AI workloads will require significantly higher performance, power consumption, area, and crystal density. The 2nm platform allows Marvell to provide highly differentiated analog, mixed-signal and foundational silicon intellectual property (IP) to build the accelerated infrastructure that can realize the promise of AI.

TSMC: 2 nanometers will be launched in 2025, and the demand will be further expanded

TSMC began mass production of the 3nm process in early 2023, and the process has been profitable since the third quarter of 2023, accounting for 15% of wafer revenue in the fourth quarter of 2023, and the revenue share is still rising.

According to TrendForce Consulting research, it is expected that the foundry market will grow by 7% in 2024, which is greatly attributed to TSMC's 3nm volume, which will further increase TSMC's market share. It is expected that TSMC's revenue will increase by 7% from the second quarter of 2024.

In its Q4 2023 results presentation, TSMC said the 2nm process (N2), which uses a Nanosheet transistor structure and is expected to be mass-produced in 2025, will lead the industry in density and energy efficiency. The N2 backside rail solution will be available in the second half of 2025 and mass production in 2026, mainly for HPC applications.

Moreover, since the demand for 2nm process is higher than 3nm for all AI innovation customers in the world, almost all AI innovators cooperate with TSMC for 2nm process technology, mainly for HPC and smart phone applications. At present, only one semiconductor company is not a customer of TSMC (industry speculation is Samsung). Therefore, TSMC said that 2nm production will be expanded, Kaohsiung plant was originally to build two 2nm wafer fab, now considering to build a third 2nm wafer fab.

Samsung: GAA structure to occupy the first mover advantage, 2nm acceleration to catch up

Samsung started mass production of the 3nm process in June 2022, and according to the latest industry news, Samsung has developed the "second generation of 3nm" process and renamed it "2nm", which is planned to be mass-produced by the end of this year. But the industry is not buying it, and many big companies are looking forward to the arrival of real 2nm technology.

Samsung Electronics unveiled its latest roadmap for the 2nm process at the 2023 Samsung Foundry Forum. Choi Si-young, president of Samsung Electronics and head of foundry business, said at the conference that Samsung will start mass production of 2-nanometer chips for mobile terminals from 2025, then use them for high performance computing (HPC) products in 2026, and expand to automotive chips in 2027.

Unlike TSMC, which started to choose GAA at 2 nm, Samsung started to use GAA structure from 3 nm process. So it seems that Samsung will have more experience with the new structure than TSMC, which is one of the advantages of Samsung's nodes in the 2nm process.

In the past, when Samsung switched from 7nm to 5nm in 2020, the second-generation 7nm technology was renamed as 5nm technology. Samsung's 7nm process technology became the first in the world to use extreme ultraviolet (EUV) exposure in 2019, which made it more stable and allowed the company to further reduce the transistor size, which is why the second generation 7nm process was renamed the 5nm process at the time.

Recently, according to the latest news from the industry, Samsung recently succeeded in grabbing a single Taiwan semiconductor. PFN has been working with TSMC since 2016, but this year, it decided to produce its next-generation AI chips on Samsung's 2-nm node. Under the agreement, Samsung will utilize its latest 2-nanometer chip processing technology for the production of AI accelerators and other AI chips in the PFN.

Intel: 2 nanometers first, still catching up with more advanced processes

According to Intel's previously announced plans, the company aims to catch up and surpass TSMC by 2024 or 2025. At Intel Foundry Services' Direct Connect conference this year, the company unveiled its latest roadmap.

Clearwater Forest, its main 18A product, has been completed and will be in production by 2025. The industry often compares Intel's 18A process with TSMC's N2 (2 nanometers) and N3P (3 nanometers) process performance, and the two big manufacturers have different views.

Intel CEO Pat Gelsinger emphasized that both the 18A and N2 utilize GAA transistors (RibbonFET), but the 1.8-nanometer nodes will use BSPND, a backside power transfer technology that optimizes power and clock. TSMC, for its part, believes its N3P (3 nm scale) technology will rival Intel's 18A in terms of power consumption, performance, and area (PPA), while its N2 (2 nm scale) will surpass it in all dimensions.

In addition, Intel's 20A manufacturing technology, scheduled for launch in 2024, will introduce RibbonFET wraparound gate transistors and backside Powered Network (BSPDN), two innovations designed to achieve higher performance, lower power consumption, and increased transistor density. Meanwhile, Intel's 18A production nodes are designed to further refine 20A innovations and deliver further PPA improvements in late 2024 to early 2025. According to Intel's process, its 2 nanometers are expected to be the earliest.

It is worth noting that Intel announced 14A (1.4nm) and its evolution version 14A-E for the first time. The Intel 14A (1.4nm) process is the industry's first process node to use the ASML High-NA EUV lithography tool, and Intel is the first company in the industry to have access to the cutting-edge High-NA tool. Intel expects to have 14A by 2027.

Rapidus: Throw money, curve overtaking advanced process

In addition to the above foundry, there is a Japanese company Rapidus worth watching. On January 22 this year, Rapidus President Soonyi Koike said at the press conference that the construction project of Rapidus 2nm chip factory in Japan was smooth, and the trial production line will be launched in April 2025 as planned. At the same time, it also said that it would consider building a second and third factory in the future.

In September last year, Rapidus built Japan's first sub-2nm logic chip factory "IIM-1" in Chitose City, Hokkaido. It is reported that the factory will be completed in December this year. According to the information, Rapidus was established in August 2022, and was jointly invested by 8 Japanese enterprises including Toyota, Sony, NTT, NEC, SoftBank, Denso, NAND Flash Daxia Kaixia, and Mitsubishi UFJ.

Previously, Rapidus signed a cooperation agreement with IBM to develop technology based on IBM's 2nm process. IBM launched the world's first 2nm chip back in 2021, and IBM's 2nm also uses GAA structure. This makes Rapidus advanced process research and development have technical support.